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In the past 20 years, developments in electronics have primarily been seen in the digital domain. Modern mixedsignal ICs have even replaced many traditional analogue implementations. But despite this, pure analogue hardware continues to have its place in many systems. Jose Perez, FAE, Future Electronics (Spain) explains how digital engineers can tackle analogue design. A common example is the signal path in a typical control or instrumentation system. Here, the sensor signal generally requires some kind of conditioning before it can drive an ADC. Nowadays the task of designing this analogue circuit, usually based on an op-amp, is only a small part of the whole system design. This means that engineers working primarily in the digital domain will often be required to perform this task.
Precision signal path A precision signal path can be defined as a signal path with an input offset voltage (VOS) of less than 1mV. When designing such a precision signal path, the overall strategy is to reach the required precision by controlling each individual source of error. These sources are the main components of what is known as the error budget equation (see next column), which can be used when designing a signal-conditioning block.
![]() Fig. 1: Typical signal-conditioning application.
Signal-conditioning block Typical functions performed by the signal-conditioning block include amplification, level shifting, buffering and filtering. With the sensor already characterised and the ADC selected, it will be clear which of these are required in order to match the sensor output to the ADC (see Figure 1). At this point the error limit is usually set in terms of the Least Significant Bit (LSB) of the ADC. Then, by considering the function’s requirements and the maximum error allowed, the process of op-amp selection can start.
Single-supply op-amp selection Selecting a single-supply op-amp that operates at the same power-supply voltage (VDD) as the ADC can reduce part count and cost. When using a single-supply device, the first consideration is its behaviour under input common-mode voltages (VCM). Single-supply op-amps can manage input voltages close to one of the power-supply rails, either ground or VDD, but typically no closer than 1V from the opposite rail. Alternatively, other single-supply devices such as Rail-to-Rail Input (RRI) op-amps are able to accept input voltages close to both supply rails. However, the input-stage structure of RRI op-amps means that their input offset voltage shows a relatively large variation, sometimes even in polarity, as VCM swings from one rail to the other. In these kinds of op-amps the effect of common-mode voltages on input offset voltage must be considered. In most applications, the RRI feature is not absolutely essential; if this is the case, it is better to choose a singlesupply op-amp that keeps VCM close to the appropriate rail. In addition to considering the input voltage values, the output characteristics must be evaluated. To take advantage of the ADC’s complete dynamic range, the op-amp output must match the ADC’s reference voltage (Vref) value. This frequently makes the use of rail-torail output op-amps mandatory.
Op-amp error budget The major op-amp parameters that affect precision are:
To analyse the parameters above, the following equation is used, with the output error given by Vin multiplied by the gain. It is important to note that external components around the op-amp would also affect circuit behaviour. ![]() It is clear from the above equation that the output error can be managed by separately managing each of the individual components of the error budget. This article will now examine each in turn.
Gain error Consider the well-known closed-loop gain expression:
ACL(ω) = A0(ω)/(1+A0(ω)xβ)
Where A0(ω) = open-loop gain It can be noted that if A0(ω) varies, then ACL will vary, as will the output voltage. The A0(ω) variation can come from frequency dependency or DC-gain variations. Although, in precision applications, the signal frequency could be low, the amplifier bandwidth must be considered, since the closed-loop bandwidth must be wide enough to avoid attenuating any frequency components. As most of the op-amps use dominant-pole compensation, the bode plot is the same as for a single-pole filter (-20dB/dec). The frequency at A0(ω) = 1 is specified in the datasheet: this is known as the Gain-Bandwidth Product (GBWP) and can be used to obtain the closed-loop bandwidth:
BWCL(-3dB) = GBWP/ACL
For example, an op-amp with a 6MHz GBWP, configured with a gain of 10, will have a closed-loop bandwidth of:
BWCL(-3dB) = 600kHz
At 600kHz the error is 29.3%, which could be intolerable, so the maximum frequency of interest should be well below the -3dB point. To achieve this, assuming an error target below half an LSB in an n-bit system, the signal’s maximum frequency should be: ![]()
Once the required bandwidth is known, the influence of A0(0) must be considered. The first term of the error-budget equation (see previous page) is due to the finite value of open-loop gain. In other words, to obtain a voltage at the output, an input voltage is needed. A0(0) varies if any of the following factors vary: output voltage, load impedance, VDD or temperature. Usually, VDD and load impedance are fixed. Even if an op-amp can be classed as having a rail-to-rail output, the allowable output span and its load conditions must be taken into account. The gain reduction achieved by operating close to the rails also introduces a non-linearity, which cannot be zeroed out by calibration. The specified minimum A0(0) value, at the system operating conditions, must be used to work out this error term. If the output swing is limited to a safe value, and the op-amp was properly selected, the passive components around the device would dictate the gain error. In fact, in a simple inverting amplifier, if resistors with a tolerance of 1% are used, the maximum gain error will be 2%.
Input offset voltage (VOS) The input offset voltage is usually one of the most significant error sources in precision op-amp circuits. Although it is a systematic error, and could be trimmed out, it is generally better to manage the offset voltage by selecting the proper device and its grade. This means that any manual adjustment or calibration routine code will be unnecessary. The VOS can be considered as a voltage source at the op-amp input (see Figure 2), and its effect will appear at the output, multiplied by the noise gain. This parameter varies with temperature, and under large changes in temperature, this can result in significant error. This dependency is specified as dVOS/dT, in µV/°C.
![]() Fig. 2: Typical op-amp application circuit.
The VOS parameter also depends on the elapsed time. It is specified in the datasheet as long-term drift, in µV/month. It is worth pointing out that its effect is not cumulative, although it is proportional to the square root of the time interval.
Input bias current (IB+, IB-) The input bias current flowing through the resistance viewed from the input creates an offset voltage, shown by terms 3 and 4 of the error-budget equation (see previous page). For the circuit shown in Figure 2 this is:
IB x R3 - IB- x (R1 x R2) / (R1 + R2)
In this particular circuit, if R3 = R1//R2, the effect of both currents is cancelled out, and the remaining error source should be the offset current. If it is not possible to implement this compensation, and the source resistance is high, the circuit can give rise to significant errors. In this case, the choice of op-amp is likely to be dictated by the need for low values of input bias current. The assumption that the two input currents have the same direction is valid for the most frequently used architectures. For less common input structures, however, this is not the case. So if the source impedance is high, the relative direction of the input currents must be taken into account. In the case of the LMP2011 high-precision op-amp from National Semiconductor, the input bias currents flow in opposite directions. Despite the value being so low that it is measured in picoAmps under most operating conditions, care must be taken if the application exhibits low VCM or the device must operate at high temperature.
Common-Mode Rejection Ratio (CMRR) The ideal op-amp only responds to differential voltages at the inputs. In reality, however, the op-amp will have a certain sensitivity to common-mode voltages, defined as (V+ + V-)/2. The CMRR could be defined as:
20log(dVCM / dVOS)
The influence of this error term will depend very much on the circuit’s configuration. For example, for the typical inverting configuration with V+ = 0, there will be no error. On the other hand, in a buffer configuration (ACL = +1), the VCM could be high, though in this case the gain is low. In the case of an op-amp with a CMRR of 90dB, configured as a non-inverter, with a ΔVCM of 1V, this will cause an input error voltage of:
ΔVCM / CMRR = 32µV
If the closed-loop gain (ACL) = +100, the output voltage would be 3.2mV.
![]() Fig. 3: Model of voltage noise (Vn) and current noise (In) sources.
The PSRR parameter indicates how the output is modified when the power supply changes, and is defined as:
20log(dVDD / dVOS)
At DC there is very little effect on total error, but the PSRR of op-amps is frequency dependent, so decoupling is very important. A common solution is to use two capacitors; a 10µF to 50µF capacitor at the power supply for low frequencies, and a low-inductance capacitor of 0.1µF for high frequencies, using short leads and PCB tracks.
Noise The sections above have described the sources of error, the effects of which can be calculated using the error-budget equation on page 18. Apart from these sources, however, the effects of noise must also be considered. One of the noise sources found in amplifier circuits is the opamp itself. In fact, the op-amp is the source for two types of noise: voltage noise and current noise (Vn and In, in the model shown in Figure 3). The main technique for specifying this is to use the noise spectral density. Typically, there will be two spectral zones: white noise at medium frequencies, and 1/f noise at low frequencies, as shown in Figure 4 for the LMP7715 low-noise amplifier from National Semiconductor. In precision applications, the low-frequency noise limits the attainable precision. The rms voltage in each zone can be calculated as:
![]()
where k = input noise density at 1Hz The noise sources are specified in terms of referred-to input noise. This matches the noise model shown in Figure 3, which also shows the Johnson noise sources at the circuit resistors: ![]()
The total noise at the output is therefore: ![]()
The noise gain (NG = 1 + R1/R2) in the formula above is the gain from the non-inverting input. In the circuit shown in Figure 3, this is flat over the bandwidth of interest, because no reactive component is considered. The bandwidth used in the formula is a Noise-power Bandwidth (NBW), which assumes a brick-wall filter response. This means that a correction factor is needed for any other filter response. The factor 1.57 accounts for the noise under the skirt of the single-pole roll-off response (-6dB/octave). Even though the 1/f noise characteristic is found in most op-amps, exceptions do exist. The LMP2011 from National Semiconductor is such a device, and uses special techniques to continuously measure and correct the input offset voltage. It is ideal for portable, low-power signal-path applications with low supply-voltage requirements. As a result, in addition to exhibiting excellent characteristics in relation to offset (0.8µV typical), stability (0.015µV/°C) and ageing (0.006µV/month), it has no 1/f region. In fact, the low-frequency noise spectrum is flat (35nV/√Hz).
![]() Fig. 4: Noise characteristics of National Semiconductor’s LMP7715.
The effect of this can be shown in a comparison with other op-amps. If a traditional op-amp configured with ACL = 100 has:
k ≈ 100nV
vnw = 6nV/√Hz Then applying the first part of the equations (shown in the previous column) for the range 0.01Hz to 1Hz provides:
Vn(rms) = 0.2µV
To convert rms values to peak-to-peak, a factor of 6.6 is generally used:
Vn(pp) = 1.3µVpp
so the noise at the output will be 0.13mVPP Repeating the calculation for the LMP2011, the output noise is 23µVPP, a reduction by a factor of around 5.5.
Conclusion Managing the error budget in a precision signal chain entails a logical, step-by-step process of calculating and managing the errors introduced by a number of different phenomena present in the circuit. Patient and methodical use of the techniques and formulae described in this article will ensure the reliable operation of a given design. Future Electronics can supply on request an error-budget calculator for a range of high-precision op-amps from National Semiconductor. This is an extremely useful time-saving tool for the kind of applications discussed in this article.
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